My brother and I do lots of side projects together. One of the latest is Blue Spec.
What is Bluespec System Verilog (also called just Bluespec or, simply BSV)?
- BSV is a more recently developed hardware description language (HDL).
- The language is primarily for synthesizing the gate design, not for verification.
- Since most industry tools largely require Verilog these days, BSV can compile into Verilog. It is acceptable to think of BSV as a verilog creation tool. This feature also makes it easy to fit into the Verilog code most projects have laying around.
